This video helps you to visualize what is happening on your board - especially important for designing very high speed interfaces. Link to the company and software used for the simulation: http://www.simberian.com/ Thank you very much to Yuriy Shlepnev for the call: https://www.linkedin.com/in/yuriy-shlepnev-7b39136
About connecting pads, drawing tracks, placing VIAs, doing fanout, moving & sliding tracks, adding shapes, creating shortcuts. Find the complete course at: http://www.fedevel.com/academy
Have you been thinking about leaving some of the memory chips un-fitted on your board and you were not sure if it's possible or how the layout should be done to support it? I have received this question for couple of times, so I try to share what we tested and what we do. We … Continue reading DDR3 layout vs Memory chip fitting
During PCB layout, you have to decide on clearance between traces. Here are 3 key factors you may need to consider: 1) Manufacturing capabilities Check with your PCB manufacturer, what is the minimum gap they can actually manufacture. Many PCB manufacturers have it on their website, as an example check this SQP International. Note: Normally … Continue reading How to decide on Minimum Gap / Clearance in PCB Layout
I found these very interesting pictures in article Minimizing EMI Caused by Radially Propagating Waves Inside High Speed Digital Logic PCBs by Franz Gisin, Zorica Pantic-Tanner. Picture: Microstrip and Stripline power density Picture: PCB Edge coupling effects
The following steps will help you to get the stackup you want.
When you are doing layout, sometimes you may want to use a special rule in a specific area. Watch this video to see how it can be easily done.