I setup a new forum for Electronic Enthusiastics & Professionals. It already has some interesting posts. I like this one about simulating CPU -> FLASH & SDRAM connection: SDR SDRAM layout recommendations.
The post is all about making decision on, how to place & route CPU + FLASH + SDRAM on one shared bus. Have a look at the simulations and notice the signal quality difference for different routing topology.
Placing series termination resistor close to the CPU (U1, input, blue color), setting up MEMORY as Output (U2, green), routing all parts in one line (I did not actually placed the chips in one line, as there will be some tracks inside the package, so I made a small stub)
The optimum case
Placing series termination resistor close to the SDRAM, setting up MEMORY as Output (green color), routing all the branches same length
Read more at the forum: http://www.fedevel.com/designhelp/forum/test/pcb-layout/82-sdr-sdram-layout-recommendations