DDR, DDR2 and DDR3 memory reference layouts can be found on JEDEC website. They provide schematics and PCB brd files (requires registration). It’s very useful to see how JEDEC does the layout.
For example see difference in address routing (yellow colour) for DDR2 (T-branch topology) and DDR3 (fly-by topology) :
Picture: DDR2 2 Rank x16 example
Picture: DDR3 2 Rank x16 planar example
You will need Allegro FREE Physical Viewer (free, but requires registration) to open the brd files. In case you have never used Allegro before, you may want to watch Very simple tutorial – How to start with Cadence Allegro.
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